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LVCMOS

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<div id="mw-content-text" class="mw-body-content mw-content-ltr" lang="en" dir="ltr"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr">Low voltage complementary metal oxide semiconductor (LVCMOS) is a low voltage class of <a href="CMOS" title="CMOS">CMOS</a> technology digital <a href="Integrated_circuits" class="mw-redirect" title="Integrated circuits">integrated circuits</a>.

<div class="mw-heading mw-heading2"><h2 id="Overview">Overview</h2></div>

To obtain better performance and lower costs, semiconductor manufacturers reduce the device geometries of integrated circuits. With each reduction the associated operating voltage must also be reduced in order to maintain the same basic operational characteristics of the transistors. As semiconductor technology has progressed, LVCMOS power supply voltage and interface standards for decreasing voltages have been defined by the <a href="Joint_Electron_Device_Engineering_Council" class="mw-redirect" title="Joint Electron Device Engineering Council">Joint Electron Device Engineering Council</a> (<a href="JEDEC" title="JEDEC">JEDEC</a>) for digital logic levels lower than 5 <a href="Volts" class="mw-redirect" title="Volts">volts</a>.

<th>Logic level, <a href="Volt" title="Volt">volts</a></th>

<th>Tolerance, volts</th>

<th>Tolerance, percent</th>

<th>References and notes

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<td><a href="Transistor%E2%80%93transistor_logic" title="Transistor–transistor logic">TTL</a> logic, not LVCMOS

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<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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</style><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/JESD8C-01.pdf">"JEDEC Standard JESD8C.01 — Interface Standard for 3.3V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. September 2007. Retrieved March 5, 2019.</cite>

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<li id="cite_note-2.5V-spec1-2"><a href="#cite_ref-2.5V-spec1_2-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/JESD8-5A-01.pdf">"JEDEC Standard JESD8-5A.01 — Interface Standard for 2.5V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. September 2007. Retrieved March 5, 2019.</cite>

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<li id="cite_note-2.5V-spec2-3"><a href="#cite_ref-2.5V-spec2_3-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/jesd80.pdf">"JEDEC Standard JESD80 — Standard for Description of 2.5V CMOS Logic Devices"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. November 1999. Retrieved March 5, 2019.</cite>

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<li id="cite_note-1.8V-spec1-4"><a href="#cite_ref-1.8V-spec1_4-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/JESD8-7A.pdf">"JEDEC Standard JESD8-7A — Interface Standard for 1.8V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. September 2007. Retrieved March 5, 2019.</cite>

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<li id="cite_note-1.8V-spec2-5"><a href="#cite_ref-1.8V-spec2_5-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/JESD76.pdf">"JEDEC Standard JESD76 — Standard for Description of 1.8V CMOS Logic Devices"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. April 2000. Retrieved March 5, 2019.</cite>

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<li id="cite_note-1.5V-spec1-6"><a href="#cite_ref-1.5V-spec1_6-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/JESD8-11A-01.pdf">"JEDEC Standard JESD8-11A.01 — Interface Standard for 1.5V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. September 2007. Retrieved March 5, 2019.</cite>

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<li id="cite_note-1.5V-spec2-7"><a href="#cite_ref-1.5V-spec2_7-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/jesd76-3.pdf">"JEDEC Standard JESD76-3 — Standard for Description of 1.5V CMOS Logic Devices"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. August 2001. Retrieved March 5, 2019.</cite>

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<li id="cite_note-1.2V-spec1-8"><a href="#cite_ref-1.2V-spec1_8-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/jesd8-12A-01.pdf">"JEDEC Standard JESD8-12A.01 — Interface Standard for 1.2V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. September 2007. Retrieved March 5, 2019.</cite>

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<li id="cite_note-1.2V-spec2-9"><a href="#cite_ref-1.2V-spec2_9-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/JESD76-2.pdf">"JEDEC Standard JESD76-2 — Standard for Description of 1.2V CMOS Logic Devices"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. June 2001. Retrieved March 5, 2019.</cite>

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<li id="cite_note-1.0V-spec1-10"><a href="#cite_ref-1.0V-spec1_10-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.jedec.org/system/files/docs/JESD8-14A-01.pdf">"JEDEC Standard JESD8-14A.01 — Interface Standard for 1.0V (Normal Range) Power Supply Voltage for Nonterminated Digital Integrated Circuits"</a> (PDF). <a href="JEDEC" title="JEDEC">JEDEC</a>. September 2007. Retrieved March 5, 2019.</cite>

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This article is issued from <a class="external text" title="Last edited on 2025-06-16" href="https://en.wikipedia.org/wiki/?title=LVCMOS&oldid=1295821092">Wikipedia</a>. The text is available under <a class="external text" href="https://creativecommons.org/licenses/by-sa/4.0/deed.en">Creative Commons Attribution-Share Alike 4.0</a> unless otherwise noted. Additional terms may apply for the media files.

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